2012
DesignCon Paper: "Simulating Large Systems with Thousands of Serial Links" and slides (Ericsson & SiSoft co-authors)
DesignCon Tutorial: "Channel Eye Diagram Generation, Pre-Hardware" Session 2-MP2
2010
DesignCon Paper Award Finalist: "Simulation Techniques for 6+ Gbps Serial Links" also slides and audio (Ericsson & Amphenol co-authors)
2009
Webinar: "Advanced Techniques for Channel Analysis" and slides (Cadence Allegro PCB SI GXL specific)
DesignCon Paper Award: "New Serial Link Simulation Process, 6 Gbps SAS Case Study" and presentation (Hitachi GST & IBM co-authors)
XrossTalk Magazine: "A Process for Serial Link Signal Integrity Analysis"
2008
CDNLive MVP: “New Technologies for 6 Gbps Serial Link Design & Simulation, a Case Study” and presentation (Hitachi GST & IBM co-authors)
2007
Article: “Signals on Serial Links: Now you see ‘em, now you don’t."
EETimes: “Soaring data rates signal coming crisis”
CDNLive: “Using Allegro PCB SI GXL (630) to make your Multi-GHz Serial Link work right out of the box” and presentation and webinar
CDNLive: “Adapting Signal Integrity Tools and Techniques for 6 Gbps and Beyond”
2005
DesignCon: “New Techniques for Designing and Analyzing Multi-GigaHertz Serial Links” and presentation (Intel co-authors)
IBIS Summit: “Modeling Complex IO with IBIS 4.1”
EETimes: “IBIS can help model gigabit pre-emphasis”
Webinar: “New IBIS Techniques for Modeling Complex IO”
2004
FPGA Journal: “Fast and Accurate Multi-GigaHertz Modeling Techniques”
Paper: “S-Parameter Correlation of typical PCB interconnect structures” shorter version at CommsDesign (co-written with Intel)
Webinar: "Introducing Channel Analysis for PCB Systems"
Webinar: “Understanding and Using S-Parameters for PCB Signal Integrity”
Webinar: “How to Build Fast and Accurate Multi-Gigabit Transceiver Models”
2003
Xcell Journal: “Surf the Serial Wave to Success”
2002
ICUG: “Optimizing your Design Chain with Design Kits – Practical Advice for Kit Builders and Kit Users”
ProgWorld: “Implementing Muilti-Gigabit Serial Links in a System of PCBs” and video
Xcell Journal: “Get up to Multi-Gigabit Speed” (Xilinx co-author)
2001
Design Solutions: "Definition and Description of High-Speed Design Process"
2000
IBIS Summit: “Behavioral Receiver Modeling”
1999
Article: “Definition of High-Speed”
1998
DesignCon: “An Optimized Methodology for High-Speed Design” (co-written with Intel)
1997
DesignCon Best Paper: “Signal Integrity Engineering in High-Speed Digital Systems” and in Chinese
1993
EDN: “Treat pc-board traces as transmission lines to specify drive buffers”
IBIS: "Telian founds IBIS Open Forum"
1992
Video: "PCI: Second Decade Performance"
1991
US Patent: “5,028,809 Computer Bus Structure Permitting Replacement of Modules During Operation” (HP co-authors)
