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Read more from this Published Work at the link below.“Readers will gain an intuitive sense of what types of channels might be acceptable at 6 Gbps, across a variety of PCB trace length, connector, and cabling combinations.” New Serial Link Simulation Process, 6 Gbps SAS Case Study For Serial Link SI “it’s not possible to simply ask for ‘fast’ and ‘slow’ corner case analysis and expect the tools to understand what you mean.” A Process for Serial Link Signal Integrity Analysis “Typically the first question to answer is the format of the active SerDes Transmit (Tx) and Receive (Rx) models.” A Process for Serial Link Signal Integrity Analysis “This paper has shown that AMI models are starting to appear and illustrated how they can be used in practice to perform both specification compliance testing and system design margin analysis.” New Serial Link Simulation Process, 6 Gbps SAS Case Study “Even against worst-case tolerances, decent margin exists in 6 Gbps applications around -14 dB channel loss. Worst-case margins become questionable around -16 New Technologies for 6 Gbps Serial Link Design & Simulation, a Case Study “It should be noted that the process and values associated with tolerancing the simulations for worst-case are quite different than those used for more typical, lower-speed, SI analysis.” New Serial Link Simulation Process, 6 Gbps SAS Case Study “More margin can be obtained by routing the Rx channels at 85 Ohm (instead of 100 Ohm) differential impedance. The Tx channels can be routed either way.” New Technologies for 6 Gbps Serial Link Design & Simulation, a Case Study “Deriving a model of numerous cables and connectors represents an interesting design choice. Since some of the cables and connectors involved were undetermined, the design team elected to prototype a couple viable options and measure their performance. This was done by extracting a 4-port end-to-end S-Parameter model of the interconnect using a Vector Network Analyzer (VNA). The extracted model is expected to be both more accurate and lest costly to derive when compared with field-solving 3D models of each sub-section of the interconnect and then cascading them together.” Using Allegro PCB SI GXL to make your multi-GHz serial link work left out of the box “At first, these nulled frequencies seem too high to be of concern to our 750 MHz SATA signals. However, when the ESD device model is placed into the simulation, the two frequency dips move into the range of interest either on or near our 3rd harmonic (Tx routing at left below, Rx routing at left). Due to this, slight changes in the (under-specified) parastics of the ESD devices can shift the failing frequencies within the ranges shown and cause problems.” Using Allegro PCB SI GXL to make your multi-GHz serial link work left out of the box “In early 1993 I visited all the major EDA vendors to ask if they’d like to participate in what became known as IBIS. It was like putting a match to dynamite.” Signals on Serial Links: Now you see ‘em, now you don’t. What can we do? “This makes sense when you realize that signal integrity is in the process of moving from something solved on a PCB to something increasingly performed inside the IC. As such, we can no longer simulate our signal’s performance without a much more complex model of the IC. The lowly digital receiver model has transformed itself from clamp curves and die capacitance into a complex DSP engine.” Signals on Serial Links: Now you see ‘em, now you don’t. What can we do? “However, while we’re applauding our new abilities to recover a signal out of an ugly pile of analog noise, we find we’ve created another monster. Once again, the signal appearing at the component pins can’t be measured.” Signals on Serial Links: Now you see ‘em, now you don’t. What can we do? “Serial links have redefined timing requirements to focus on the integrity of eye openings. Eye height and width can not be properly analyzed without comprehending the storage and decay of energy in the system. The Interconnect Storage Potential (ISP) is a useful measure of an interconnect’s capacity to store charge, and provides insight into the types of bit streams required to develop a meaningful eye diagram.” New Techniques for Designing and Analyzing Multi-GigaHertz Serial Links “One discontinuity that has occurred involves the efficacy of current simulation tools when applied to MGH serial data transmission. Since an eye diagram is built by superimposing multiple events rather than accurately characterizing a single event (e.g. the setup and hold relationship of two signals), more simulation must naturally be done. But the question arises: “How much more?” This is the question we will attempt to answer in this paper.” New Techniques for Designing and Analyzing Multi-GigaHertz Serial Links “As will be illustrated, there are numerous mistakes that can be made when measuring, generating, and using S-Parameters that can lead you to the conclusion that the tools do not work correctly. Throughout this paper, common mistakes will be offset with red italic type for easy reference.” S-Parameter Correlation of typical PCB interconnect structures “However, it is simple enough to narrow the gap by adjusting the (approximate) values for the dielectric constant (Er) and the loss tangent (Lt). But we have not done so to highlight the issue that more accuracy may become required for Er and Lt values in common FR4 in the coming years” S-Parameter Correlation of typical PCB interconnect structures “The PCI specification takes advantage of these inherent reflections by introducing reflected-wave switching. … However, because you’re trying to guarantee an ac phenomenon, PCI departs from standard dc specification methods. … Being able predict the minimum step realized by a PCI driver was critical to ensure reliable reflected-wave switching.” Treat pc-board traces as transmission lines to specify drive buffers “Next remember that tools alone don’t solve problems. You drive the tools - they do not drive you. It has been well said that “a fool with a tool is still a fool.” The job isn’t done when the simulation is run. What does it mean? The value comes from interpreting the results. Simulation is the means to an end, not an end in itself.” Signal Integrity Engineering in High-Speed Digital Systems “’Loss’ is a measure of how much you lost. For example, if a man goes to a restaurant with $100 and leaves with $50 he has experienced ‘loss’ and his wallet is now 20*log(50/100) or 6 dB down.” Understanding and Using S-Parameters for PCB Signal Integrity |
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